In some data system applications, a customer supplies data for transport through a modem or transceiver to a communications system at a data rate that is controlled by the communications system. In such applications, the data supplied by the customer is typically synchronized with a clock signal coupled from the communications system to the customer. In other data system applications, the customer supplies data to the communications system at a rate which is customer-controlled. Such systems can utilize either two or four conductors. In two-conductor systems, bidirectional communications are provided through a single conductor pair while in four-conductor systems the signals coupled in each direction are transported by different conductor pairs. In either case, the data rates in both directions, each controlled by the customer at each system end, can be the same or different from one another.
Echoes or crosstalk is a problem in communications systems which can often be substantially eliminated by the use of echo cancellers. Such cancellers can be implemented within an analog "front end" interpolator of the transceiver. In this implementation, in the transceiver's receiver, the incoming line signal from a two- or four-wire communications system is sampled by a first analog-to-digital (A/D) converter. The echo canceller then subtracts tile synthesized echo from the digital samples provided by the converter using tile transmit symbols provided by the transceiver's transmitter. The echo-free samples are then converted back to an analog signal by a digital-to-analog converter (D/A), passed through a low-pass filter and supplied to a second A/D converter. This second A/D converter provides digital samples to a conventional receiver which outputs the received data. In the transmit direction, the transmitter provides the transmit symbols which are pulse shaped by shaping circuitry and thence converted into an analog signal by a D/A converter. For proper operation of the echo canceller, the first A/D converter in the receiver and both D/A converters are strobed by the transmit clock while the second A/D converter is strobed by the receive clock. The challenge in implementing this front end is to provide precision converters on a single integrated circuit with asynchronous transmit and receive clocks. This is often difficult, if not impossible, to achieve.
To eliminate this problem, more recently developed transceivers utilize A/D and D/A converters respectively disposed in tile receiver and transmitter of the transceiver which are strobed by a common sample clock. The A/D converter forms samples of the incoming signal received from a remote location while the D/A converter in the transmitter forms samples of the signal to be transmitted to the remote location. To compensate for the fact that the A/D converter in the receiver is not synchronized to the transmitter clock at the remote location, the output of the A/D converter is coupled through the echo canceller to a digital interpolator. The digital interpolator alters the sample values it receives in response to a control signal generated by a timing recovery circuit. The control signal is representative of any asynchronism between the common sample clock and the remote transmitter clock. The effect of the interpolator, therefore, is to alter the timing phase of the common sample clock source and provide the samples which would have been formed had the common sample clock been synchronized to tile transmitter clock at the remote location. While this solution provides satisfactory results in many applications, the cost of implementing a digital interpolator for high-speed, i.e., .gtoreq.0.5 megabits/second cannot be provided within the desired cost objectives.
It would therefore be desirable if a synchronization scheme could be developed which is suitable for high-speed data applications which could be readily implemented at low cost in an integrated circuit.